Appendix A
Reference Material

A.1 Basic Logic Gates

  1. AND gate (page 170)

    PIC

    x
    y
    x y



    0
    0
    0
    0
    1
    0
    1
    0
    0
    1
    1
    1
  2. OR gate (page 170)

    PIC

    x
    y
    x + y



    0
    0
    0
    0
    1
    1
    1
    0
    1
    1
    1
    1
  3. NOT gate (page 171)

    PIC

    x
    x


    0
    0
    0
    1
  4. NAND gate (page 278)

    PIC

    x
    y
    (x y)



    0
    0
    1
    0
    1
    1
    1
    0
    1
    1
    1
    0
  5. NOR gate (page 278)

    PIC

    x
    y
    (x + y)



    0
    0
    1
    0
    1
    0
    1
    0
    0
    1
    1
    0

A.2 Register Names

(page 454)

bits 63-0

bits 31-0

bits 15-0

bits 15-8

bits 7-0

rax

eax

ax

ah

al

rbx

ebx

bx

bh

bl

rcx

ecx

cx

ch

cl

rdx

edx

dx

dh

dl



rsi

esi

si

sil

rdi

edi

di

dil

rbp

ebp

bp

bpl

rsp

esp

sp

spl



r8

r8d

r8w

r8b

r9

r9d

r9w

r9b

r10

r10d

r10w

r10b

r11

r11d

r11w

r11b

r12

r12d

r12w

r12b

r13

r13d

r13w

r13b

r14

r14d

r14w

r14b

r15

r15d

r15w

r15b

A.3 Argument Order in Registers

(page 550)

Argument Register
first rdi
second rsi
third rdx
fourth rcx
fifth r8
sixth r9

A.4 Register Usage

(page 471)

Register

Special usage

Called function preserves contents
rax

1st function return value.

No
rbx

Optional base pointer.

Yes
rcx

Pass 4th argument to function.

No
rdx

Pass 3rd argument to function; 2nd function return value.

No
rsp

Stack pointer.

Yes
rbp

Optional frame pointer.

Yes
rdi

Pass 1st argument to function.

No
rsi

Pass 2nd argument to function.

No
r8

Pass 5th argument to function.

No
r9

Pass 6th argument to function.

No
r10

Pass function’s static chain pointer.

No
r11

No
r12

Yes
r13

Yes
r14

Yes
r15

Yes

A.5 Assembly Language Instructions Used in This Book

This summary shows the assembly language instructions used in this book. The page number where the instruction is explained in more detail, is also given. This book provides only an introduction to the usage of each instruction. You need to consult the manuals ([2][6], [14][18]) in order to learn all the possible uses of the instructions.

data movement:
opcode source destination action page





cbtw convert byte to word, al ax 699





cwtl convert word to long, ax eax 699





cltq convert long to quad, eax rax 699





cwtd convert word to long, ax dx:ax 788





cltd convert long to quad, eax edx:eax 788





cqto convert quad to octuple, rax rdx:rax 788





cmovcc %reg/mem %reg conditional move 709





movs $imm/%reg %reg/mem move 508





movs %reg/mem %reg move 508





movsss $imm/%reg %reg/mem move, sign extend 696





movzss $imm/%reg %reg/mem move, zero extend 696





popw %reg/mem pop from stack 568





pushw $imm/%reg/mem push onto stack 568










s = b, w, l, q; w = l, q; cc = condition codes

program flow control:
opcode location action page




call label call function 548




iret return from kernel function 878




ja label jump above (unsigned) 686




jae label jump above/equal (unsigned) 686




jb label jump below (unsigned) 686




jbe label jump below/equal (unsigned) 686




je label jump equal 682




jg label jump greater than (signed) 689




jge label jump greater than/equal (signed) 689




jl label jump less than (signed) 689




jle label jump less than/equal (signed) 689




jmp label jump 694




jne label jump not equal 682




jno label jump no overflow 682




jcc label jump on condition codes 682




leave undo stack frame 582




ret return from function 585




syscall call kernel function 589




sysret return from kernel function 883








cc = condition codes

arithmetic/logic:
opcode source destination action page





adds $imm/%reg %reg/mem add 609





adds mem %reg add 609





ands $imm/%reg %reg/mem bit-wise and 750





ands mem %reg bit-wise and 750





cmps $imm/%reg %reg/mem compare 679





cmps mem %reg compare 679





decs %reg/mem decrement 702





divs %reg/mem unsigned divide 780





idivs %reg/mem signed divide 786





imuls %reg/mem signed multiply 778





incs %reg/mem increment 701





leaw mem %reg load effective address 581





muls %reg/mem unsigned multiply 772





negs %reg/mem negate 791





ors $imm/%reg %reg/mem bit-wise inclusive or 750





ors mem %reg bit-wise inclusive or 750





sals $imm/%cl %reg/mem shift arithmetic left 759





sars $imm/%cl %reg/mem shift arithmetic right 754





shls $imm/%cl %reg/mem shift left 759





shrs $imm/%cl %reg/mem shift right 754





subs $imm/%reg %reg/mem subtract 614





subs mem %reg subtract 614





tests $imm/%reg %reg/mem test bits 679





tests mem %reg test bits 679





xors $imm/%reg %reg/mem bit-wise exclusive or 750





xors mem %reg bit-wise exclusive or 750










s = b, w, l, q; w = l, q

SSE floating point conversion:
opcode source destination action page





cvtsd2si %xmmreg/mem %reg scalar double to signed integer 847





cvtsd2ss %xmmreg %xmmreg/%reg scalar double to single float 847





cvtsi2sd %reg %xmmreg/mem signed integer to scalar double 847





cvtsi2sdq %reg %xmmreg/mem signed integer to scalar double 847





cvtsi2ss %reg %xmmreg/mem signed integer to scalar single 847





cvtsi2ssq %reg %xmmreg/mem signed integer to scalar single 847





cvtss2sd %xmmreg %xmmreg/mem scalar single to scalar double 847





cvtss2si %xmmreg/mem %reg scalar single to signed integer 847





cvtss2siq %xmmreg/mem %reg scalar single to signed integer 847










x87 floating point:
opcode source destination action page





fadds memfloat add 861





faddp add/pop 861





fchs change sign 861





fcoms memfloat compare 861





fcomp compare/pop 861





fcos cosine 861





fdivs memfloat divide 861





fdivp divide/pop 861





filds memint load integer 861





fists memint store integer 861





flds memint load floating point 861





fmuls memfloat multiply 861





fmulp multiply/pop 861





fsin sine 861





fsqrt square root 861





fsts memint floating point store 861





fsubs memfloat subtract 861





fsubp subtract/pop 861










s = b, w, l, q; w = l, q

A.6 Addressing Modes

____________________________________________________________

register direct:

The data value is located in a CPU register.

syntax: name of the register with a “%” prefix.

example: movl    %eax, %ebx



immediate data:

The data value is located immediately after the instruction. Source operand only.

syntax: data value with a “$” prefix.

example: movl    $0xabcd1234, %ebx



base register plus offset:

The data value is located in memory. The address of the memory location is the sum of a value in a base register plus an offset value.

syntax: use the name of the register with parentheses around the name and the offset value immediately before the left parenthesis.

example: movl    $0xaabbccdd, 12(%eax)



rip-relative:

The target is a memory address determined by adding an offset to the current address in the rip register.

syntax: a programmer-defined label

example: je     somePlace



indexed:

The data value is located in memory. The address of the memory location is the sum of the value in the base_register plus scale times the value in the index_register, plus the offset.

syntax: place parentheses around the comma separated list (base_register, index_register, scale) and preface it with the offset.

example: movl    $0x6789cdef, -16(%edx, %eax, 4)